stm32 /stm32wl3 /STM32WL33 /ADC /TEST_CONF

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Interpret as TEST_CONF

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADC_SWITCH_EN0SEL_VIN_TYPE 0 (ADC_RUN)ADC_RUN 0 (ADC_ENABLE)ADC_ENABLE

Description

TEST_CONF register

Fields

ADC_SWITCH_EN

ADC_SWITCH_EN[15:0]: enable individually each connection of the switching matrix at the

ADC input.

For each bit:

0: switch X is ON

1: switch X is OFF

Bit mapping (corresponding to AUXADC_INSEL_1V2[15:0]):

Bit 0: VINM[0] to ADC negative input

Bit 1: VINM[1] to ADC negative input

Bit 2: VINM[2] to ADC negative input

Bit 3: VINM[3] to ADC negative input

Bit4: GND to ADC negative input

Bit5: VBAT to ADC negative input

Bit6: GND to ADC negative input

Bit7: VDDA to ADC negative input

Bit8: VINP[0] to ADC positive input

Bit9: VINP[1] to ADC positive input

Bit10: VINP[2] to ADC positive input

Bit11: VINP[3] to ADC positive input

Bit12: VBAT to ADC positive input

Bit13: TEMP to ADC positive input

Bit14: GND to ADC positive input

Bit15: VDDA to ADC positive input.

SEL_VIN_TYPE

SEL_VIN_TYPE[1:0]: operation mode of the selected VIN

00: ADC single negative input

01: ADC single positive input

10: ADC differential input mode

11: reserved

ADC_RUN

ADC_RUN: Start/stop ADC conversion.

0: stop the ADC conversion,

1: starts the ADC conversion.

ADC_ENABLE

ADC_ENABLE:

0: disable the ADC (power OFF)

1: enable the ADC (power ON)

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