stm32 /stm32wl3 /STM32WL33 /AES /AES_CR

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Interpret as AES_CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0DATATYPE 0MODE 0CHMOD_1_0 0 (CCFC)CCFC 0 (ERRC)ERRC 0 (CCFIE)CCFIE 0 (ERRIE)ERRIE 0 (DMAINEN)DMAINEN 0 (DMAOUTEN)DMAOUTEN 0GCMPH 0 (CHMOD_2)CHMOD_2 0 (KEYSIZE)KEYSIZE 0NPBLB

Description

AES_CR register

Fields

EN

EN: AES IP enable

DATATYPE

DATATYPE[1:0]: Data type selection

MODE

MODE[1:0]: AES operating mode

CHMOD_1_0

CHMOD[1:0]: AES Chaining Mode selection

CCFC

CCFC: Computation Complete Flag Clear

ERRC

ERRC: Error clear

CCFIE

CCFIE: CCF Flag Interrupt Enable

ERRIE

ERRIE: Error Interrupt Enable

DMAINEN

DMAINEN: DMA Input Enable

DMAOUTEN

DMAOUTEN: DMA Output Enable

GCMPH

GCMPH[1:0]: GCM or CCM Phase selection

CHMOD_2

CHMOD[2]: Chaining mode selection, bit [2]

KEYSIZE

KEYSIZE: Key Size selection.

NPBLB

NPBLB: Number of Padding Bytes in Last Block of payload.

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