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stm32 /stm32wl3 /STM32WL33 /DAC /SWTRIGR

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Interpret as SWTRIGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWTRIG)SWTRIG

Description

SWTRIGR register

Fields

SWTRIG

SWTRIG: DAC channel software trigger This bit is set by software to enable/disable the

software trigger.

0: Software trigger disabled

1: Software trigger enabled

Note: This bit is cleared by hardware (one APB0 clock cycle later) once the

DAC_DHR register value has been loaded into the DAC_DOR register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32