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stm32 /stm32wl3 /STM32WL33 /DMA /DMA_CPAR5

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Interpret as DMA_CPAR5

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PA

Description

DMA_CPARx register

Fields

PA

PA[31:0]: Peripheral address

Base address of the peripheral data register from/to which the data will be read/written.

When PSIZE is 01 (16-bit), the PA[0] bit is ignored. Access is automatically aligned to a halfword

address.

When PSIZE is 10 (32-bit), PA[1:0] are ignored. Access is automatically aligned to a word

address.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32