| PE | Peripheral enable
- 0: Peripheral disable
- 1: Peripheral enable
|
| TXIE | TX Interrupt enable
- 0: Transmit (TXIS) interrupt disabled
- 1: Transmit (TXIS) interrupt enabled
|
| RXIE | RX Interrupt enable
- 0: Receive (RXNE) interrupt disabled
- 1: Receive (RXNE) interrupt enabled
|
| ADDRIE | Address match Interrupt enable (slave only)
- 0: Address match (ADDR) interrupts disabled
- 1: Address match (ADDR) interrupts enabled
|
| NACKIE | Not acknowledge received Interrupt enable
- 0: Not acknowledge (NACKF) received interrupts disabled
- 1: Not acknowledge (NACKF) received interrupts enabled
|
| STOPIE | STOP detection Interrupt enable
- 0: Stop detection (STOPF) interrupt disabled
- 1: Stop detection (STOPF) interrupt enabled
|
| TCIE | Transfer Complete interrupt enable
- 0: Transfer Complete interrupt disabled
- 1: Transfer Complete interrupt enabled
|
| ERRIE | Error interrupts enable
- 0: Error detection interrupts disabled
- 1: Error detection interrupts enabled
Note: Any of these errors generate an interrupt:
Arbitration Loss (ARLO)
Bus Error detection (BERR)
Overrun/Underrun (OVR)
Timeout detection (TIMEOUT)
PEC error detection (PECERR)
Alert pin event detection (ALERT)
|
| DNF | Digital noise filter
These bits are used to configure the digital noise filter on SDA and SCL input. The digital filter
will filter spikes with a length of up to DNF[3:0] * tI2CCLK
- 0000: Digital filter disabled
- 0001: Digital filter enabled and filtering capability up to 1 tI2CCLK
- 1111: digital filter enabled and filtering capability up to15 tI2CCLK
|
| ANFOFF | Analog noise filter OFF
- 0: Analog noise filter enabled
- 1: Analog noise filter disabled
|
| TXDMAEN | DMA transmission requests enable
- 0: DMA mode disabled for transmission
- 1: DMA mode enabled for transmission
|
| RXDMAEN | DMA reception requests enable
- 0: DMA mode disabled for reception
- 1: DMA mode enabled for reception
|
| SBC | Slave byte control
This bit is used to enable hardware byte control in slave mode.
- 0: Slave byte control disabled
- 1: Slave byte control enabled
|
| NOSTRETCH | Clock stretching disable
This bit is used to disable clock stretching in slave mode. It must be kept cleared in master mode.
- 0: Clock stretching enabled
- 1: Clock stretching disabled
Note: This bit can only be programmed when the I2C is disabled (PE = 0).
|
| GCEN | 0 (B_0x0): General call disabled. Address 0b00000000 is NACKed.
1 (B_0x1): General call enabled. Address 0b00000000 is ACKed.
|
| SMBHEN | SMBus Host address enable
- 0: Host address disabled. Address 0b0001000x is NACKed.
- 1: Host address enabled. Address 0b0001000x is ACKed.
|
| SMBDEN | SMBus Device Default address enable
- 0: Device default address disabled. Address 0b1100001x is NACKed.
- 1: Device default address enabled. Address 0b1100001x is ACKed.
|
| ALERTEN | SMBus alert enable
Device mode (SMBHEN=0):
- 0: Releases SMBA pin high and Alert Response Address Header disabled: 0001100x followed by NACK.
- 1: Drives SMBA pin low and Alert Response Address Header enables: 0001100x followed by ACK.
Host mode (SMBHEN=1):
- 0: SMBus Alert pin (SMBA) not supported.
- 1: SMBus Alert pin (SMBA) supported.
|
| PECEN | PEC enable
- 0: PEC calculation disabled
- 1: PEC calculation enabled
|