stm32 /stm32wl3 /STM32WL33 /I2C2 /I2C_CR2

Slave address

Transfer direction (master mode)

• 0: Master requests a write transfer.
• 1: Master requests a read transfer.

Ten-bit addressing mode (master mode)

• 0: The master operates in 7-bit addressing mode,
• 1: The master operates in 10-bit addressing mode

Ten bit (10-bit) address header only read direction (master receiver mode)

• 0: The master sends the complete 10 bit slave address read sequence: Start + 2 bytes 10bit address in write direction + Restart + 1st 7 bits of the 10 bit address in read direction.
• 1: The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction.

Start generation This bit is set by software, and cleared by hardware after the Start followed by the address sequence is sent, by an arbitration loss, by a timeout error detection, or when PE = 0. It can also be cleared by software by writing 1 to the ADDRCF bit in the I2C_ICR register.

• 0: No Start generation.
• 1: Restart/Start generation: If the I2C is already in master mode with AUTOEND = 0, setting this bit generates a Repeated Start condition when RELOAD=0, after the end of the NBYTES transfer. Otherwise setting this bit will generate a START condition once the bus is free.

Stop generation (master mode) The bit is set by software, cleared by hardware when a Stop condition is detected, or when PE = 0. In Master Mode:

• 0: No Stop generation.
• 1: Stop generation after current byte transfer.

NACK generation (slave mode) The bit is set by software, cleared by hardware when the NACK is sent, or when a STOP condition or an Address matched is received, or when PE=0.

• 0: an ACK is sent after current received byte.
• 1: a NACK is sent after current received byte.

Number of bytes The number of bytes to be transmitted/received is programmed there. This field is dont care in slave mode with SBC=0.

NBYTES reload mode This bit is set and cleared by software.

• 0: The transfer is completed after the NBYTES data transfer (STOP or RESTART will follow).
• 1: The transfer is not completed after the NBYTES data transfer (NBYTES will be reloaded). TCR flag is set when NBYTES data are transferred, stretching SCL low.

Automatic end mode (master mode) This bit is set and cleared by software.

• 0: software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low.
• 1: Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred.

Packet error checking byte This bit is set by software, and cleared by hardware when the PEC is transferred, or when a STOP condition or an Address matched is received, also when PE=0.

• 0: No PEC transfer.
• 1: PEC transmission/reception is requested