Regviz

stm32 /stm32wl3 /STM32WL33 /I2C2 /I2C_OAR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as I2C_OAR2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wl3/STM32WL33/I2C2/I2C_OAR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OA20OA2MSK 0 (OA2EN)OA2EN

Description

I2C_OAR2 register

Fields

OA2

Interface address bits 7:1 of address Note: These bits can be written only when OA2EN=0.
OA2MSK

Own Address 2 masks

  • 000: No mask
  • 001: OA2[1] is masked and dont care. Only OA2[7:2] are compared.
  • 010: OA2[2:1] are masked and dont care. Only OA2[7:3] are compared.
  • 011: OA2[3:1] are masked and dont care. Only OA2[7:4] are compared.
  • 100: OA2[4:1] are masked and dont care. Only OA2[7:5] are compared.
  • 101: OA2[5:1] are masked and dont care. Only OA2[7:6] are compared.
  • 110: OA2[6:1] are masked and dont care. Only OA2[7] is compared.
  • 111: OA2[7:1] are masked and dont care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged.
OA2EN

Own Address 2 enable

  • 0: Own address 2 disabled. The received slave address OA2 is NACKed.
  • 1: Own address 2 enabled. The received slave address OA2 is ACKed.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32