Regviz

stm32 /stm32wl3 /STM32WL33 /LCSC /LCSC_ANATST_CFG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LCSC_ANATST_CFG

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wl3/STM32WL33/LCSC/LCSC_ANATST_CFG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VCMBUFF_ENOUT_SEL)VCMBUFF_ENOUT_SEL 0 (VCMBUFF_ENOUT)VCMBUFF_ENOUT 0 (VCMBUFF_PWDN_SEL)VCMBUFF_PWDN_SEL 0 (VCMBUFF_PWDN)VCMBUFF_PWDN 0 (COMP_PWDN_SEL)COMP_PWDN_SEL 0 (COMP_PWDN)COMP_PWDN 0 (DAC_PWDN_SEL)DAC_PWDN_SEL 0 (DAC_PWDN)DAC_PWDN

Description

LCSC ANA Test Configuration Register

Fields

VCMBUFF_ENOUT_SEL

Selection of the signal to be used to supply the DAC in the LCSC
VCMBUFF_ENOUT

VCMBUFFER output buffer enable pin
VCMBUFF_PWDN_SEL

Selection of the signal to be used to supply the DAC in the LCSC
VCMBUFF_PWDN

VCMBUFF power-down pin
COMP_PWDN_SEL

Selection of the signal to be used to supply the COMP in the LCSC Analog part
COMP_PWDN

COMP power-down pin
DAC_PWDN_SEL

Selection of the signal to be used to supply the DAC in the LCSC Analog part
DAC_PWDN

DAC power-down pin

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32