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stm32 /stm32wl3 /STM32WL33 /MR_SUBG /AGC1_CTRL

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Interpret as AGC1_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AGC_MIN_THR 0AGC_MAX_THR

Description

AGC1_CTRL register

Fields

AGC_MIN_THR

Minimum signal threshold.
AGC_MAX_THR

Maximum signal threshold.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32