Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32wl3/STM32WL33/MR_SUBG/DEMOD_DIG_ENG#0x0
DEMOD_DIG_ENG register
Number of data samples at RX start for which the signal at the output of the channel filter is kept forced to zero:
https://github.com/modm-io/cmsis-svd-stm32