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stm32 /stm32wl3 /STM32WL33 /MR_SUBG /SUBG_DIG_CTRL0

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Interpret as SUBG_DIG_CTRL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FORCE_GPIO_OUTPUT)FORCE_GPIO_OUTPUT

Description

SUBG_DIG_CTRL0 register

Fields

FORCE_GPIO_OUTPUT

Option for the direct GPIO signal output

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32