| PVDE | PVDE Programmable Voltage Detector Enable
When this bit is set the Power Voltage Detector is enabled
|
| PVDLS | PVDLS[2:0] Programmable Voltage Detector Level selection
- 000: 2.05 V - Lowest level
- 001: 2.20 V
- 010: 2.36 V
- 011: 2.52 V
- 100: 2.64 V
- 101: 2.81 V
- 110: 2.91 V - Highest level
- 111: External input analog voltage (compare internally to VBGP; When external input VBGP
then PVDO=1)
|
| DBGRET | DBGRET: PA2 and PA3 retention enable after DEEPSTOP
- 0: PA2, PA3 don’t retain their status exiting from DEEPSTOP (default).
- 1: PA2, PA3 retain their status exiting from DEEPSTOP.
|
| RAMRET1 | RAMRET1: RAM1 retention during low power mode
- 1: RAM1 bank is powered during low power mode
- 0: RAM1 bank is disabled during low power mode (by default)
|
| LPREG_FORCE_VH | force LPREG=1.2V during DEEPSTOP
- 1: Force LPREG=1.2V during DEEPSTOP
- 0: No Force (Default)
Note LPREG= 1.2v can still apply when LCDEN or COMP.SCALEREN request it
|
| LPREG_VH_STATUS | status LPREG VH (1.2v) during DEEPSTOP
- 1: LPREG=1.2V during DEEPSTOP
- 0: LPREG=1V during DEEPSTOP
|
| GPIORET | GPIORET: GPIO retention enable.
- 0: Release GPIO retention after deepstop (Should be reset after restore Context)
- 1: Enable GPIO Retention during deepstop (Must be set before deepstop)
|
| ENTS | ENTS: Enable Temperature Sensor
- 1: Temperature sensor is enabled
- 0: Temperature sensor is disabled
|
| RFREGEN | RFREGEN: RF Regulator Enable
- 1: Enable RF Regulator
- 0: Disable RF Regulator (Note: RF Regulator can still be enabled by the RFSUGB or RCC_CR.HSEON)
|
| RFREGCEXT | RFREGCEXT: RF Regulator External Supply Bypass
- 1: External supply bypass capability
- 0: Internal supply only
|
| RFREGBYP | RFREGBYP: RF Regulator Bypass Enable
- 1: LDO output connected to VSMPS.
- 0: internally generated 1.2V
|
| RFREGRDY | RFDREGRDY: RF Regulator Ready flag
- 1: RF Regulator is ready
- 0: RF Regulator is not ready
|
| RFREGON_STATUS | RFREGON_STATUS: RF Regulator On Status
- 1: RF Regulator is enabled
- 0: RF Regulator is disabled
|