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stm32 /stm32wl3 /STM32WL33 /PWRC /DBG_STATUS_REG1

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Interpret as DBG_STATUS_REG1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SMPS_FSM_STATE 0FLASH_FSM_STATE

Description

DBG_STATUS_REG1 register

Fields

SMPS_FSM_STATE

SMPS_FSM_STATE[2:0]: Indicates the current state of the SMPS FSM inside the PWRC.:

  • 000: STARTUP
  • 001: SMPS_REQ
  • 010: SMPS_RUN
  • 011: STOP
  • 100: NOSMPS
  • 101: PRECHARGE
  • 110: NOSMPS_BOF
FLASH_FSM_STATE

FLASH_FSM_STATE[2:0]: Indicates the current state of the FLASH FSM inside the PWRC:

  • 000: STATE1: FLASH POR
  • 001: STATE2: FLASH PWRUP
  • 010: STATE3: FLASH READY
  • 101: STATE4: FLASH SWITCH OFF
  • 110: STATE5: FLASH PWR DOWN

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32