stm32 /stm32wl3 /STM32WL33 /PWRC /IEWU

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Interpret as IEWU

Description

IEWU register

Fields

EIWL0	EWL0 Enable Internal WakeUp line LPUART When this bit is set the internal wakeup line is enabled and a rising edge will trigger a CPU wakeup event. 0: wakeup disabled. 1: wakeup enabled.
EIWL1	EIWL1 Enable Internal WakeUp line RTC When this bit is set the internal wakeup line is enabled and a rising edge will trigger a CPU wakeup event. 0: wakeup disabled. 1: wakeup enabled.
EIWL2	EIWL2 Enable Internal WakeUp line LCD When this bit is set the internal wakeup line is enabled and a rising edge will trigger a CPU wakeup event. 0: wakeup disabled. 1: wakeup enabled.
EIWL3	EIWL3 Enable Internal Wakeup line COMP When this bit is set the COMP wakeup is enabled and an edge will trigger a COMP wakeup event 0: wakeup disabled. 1: wakeup enabled.
EIWL4	EIWL4 Enable Internal Wakeup line LCSC When this bit is set the LCSC wakeup is enabled and an edge will trigger a LCSC wakeup event 0: wakeup disabled. 1: wakeup enabled.
EWMRSUBG	EWMRSUB Wakeup MRSUBG Enable When this bit is set the MRSUBG wakeup is enabled and a rising edge will trigger a MRSUBG wakeup event 0: MRSUBG wakeup disabled. 1: MRSUBG wakeup enabled.
EWMRSUBGHCPU	EWMRSUBGHCPU Wakeup MRSUBG Host CPU Enable When this bit is set the MRSUBG HOST CPU wakeup is enabled and a rising edge will trigger a MRSUBG Host CPU wakeup event 0: MRSUBG Host CPU wakeup disabled. 1: MRSUBG Host CPU wakeup enabled.
EWLPAWUR	EWLPAWUR: Wakeup Bubble Enable When this bit is set the Bubble wakeup is enabled and a rising edge will trigger a LPAWUR wakeup event 0: LPAWUR wakeup disabled. 1: LPAWUR wakeup enabled.

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