| IWUF0 | IWUF0: Internal wakeup flag (LPUART).
- 0: no wakeup from LPUART occurred since last clear.
- 1: a wakeup from LPUART occurred since last clear.
Cleared by writing 1 in this bit.
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| IWUF1 | IWUF1: Internal wakeup flag (RTC).
- 0: no wakeup from RTC occurred since last clear.
- 1: a wakeup from RTC occurred
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| IWUF2 | IWUF2: Internal wakeup flag (LCD).
- 0: no wakeup from LCD occurred since last clear.
- 1: a wakeup from LCD occurred since last clear.
Cleared by writing 1 in this bit.
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| IWUF3 | IWUF3: Internal wakeup flag (COMP).
- 0: no wakeup from COMP occurred since last clear.
- 1: a wakeup from COMP occurred since last clear.
Cleared by writing 1 in this bit.
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| IWUF4 | IWUF4: Internal wakeup flag (LCSC).
- 0: no wakeup from LCSC occurred since last clear.
- 1: a wakeup from LCSC occurred since last clear.
Cleared by writing 1 in this bit.
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| WMRSUBGF | WMRSUBGF Wakeup MRSUBG Flag
This bit is set by hardware when a MRSUBG wakeup is detected
It is cleared by a reset pad or by software writing 1 in this bit field.
- 0: No MRSUBG Wakeup detected
- 1: MRSUBG Wakeup detected
writting 1 in this bit, clears the interrupt
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| WMRSUBGHCPUF | WMRSUBGHCPUF Wakeup MRSUBG HOST CPU Flag (cf. user manual)
This bit is set by hardware when a MRSUBG HOST CPU wakeup is detected
It is cleared by a reset pad or by software writing 1 in this bit field.
- 0: No MRSUBG Host CPU wakeup detected
- 1: MRSUBG Host CPU wakeup detected
writting 1 in this bit, clears the interrupt
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| WLPAWURF | WLPAWURF Wakeup LPAWUR Flag (cf. user manual)
This bit is set by hardware when a LPAWUR wakeup is detected
It is cleared by a reset pad or by software writing 1 in this bit field.
- 0: No LPAWUR wakeup detected
- 1: LPAWUR wakeup detected
writting 1 in this bit, clears the interrupt
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