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stm32 /stm32wl3 /STM32WL33 /PWRC /SDWN_WUEN

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Interpret as SDWN_WUEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUEN)WUEN

Description

SDWN_WUEN register

Fields

WUEN

WUEN PB0 I/O WakeUp from shutdown Enable When this bit is set the PB0 wakeup from shutdown is enabled so that a rising or falling edge on PB0 (depending on SDWN_WUPOL…WUPOL bit) will trigger a CPU wakeup. It is cleared by a PORESETn.

  • 0: PB0 wakeup from shutdown disabled
  • 1: PB0 wakeup from shutdown enabled

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32