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stm32 /stm32wl3 /STM32WL33 /PWRC /TRIMR

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Interpret as TRIMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RFD_REG_TRIM 0 (SPARE)SPARE 0TRIM_MR0SMPS_TRIM 0BOF_TRIM

Description

TRIMR register

Fields

RFD_REG_TRIM

RFD_REG_TRIM[2:0]: RF LDO Trimming By default, this value is taken from the engi bytes; and saved on V12o domain when OBL done. if associated ENGTRIM is enabled the RF LDO trimming can be controlled by the dedicated ENGTRIM register. Default= ‘100’.
SPARE
TRIM_MR

TRIM_MR[3:0]: Main Regulator Voltage Trimming By default, this value is taken from the engi bytes; and saved on V12o domain when OBL done. if associated ENGTRIM.TRIMMREN is enabled the Main Regulator Voltage can be controlled by the dedicated ENGTRIM.TRIM_MR register. Default= ‘0000’.
SMPS_TRIM

SMPS_TRIM[2:0]: SMPS Output Voltage Trimming By default, this value is taken from the engi bytes; and saved on V12o domain when OBL done. if associated ENGTRIM is enabled the SMPS output voltage can be controlled by the dedicated ENGTRIM register. Default= ‘011’.
BOF_TRIM

BOF_TRIM[2:0]: Bypass On the Fly Output Voltage Trimming By default, this value is taken from the engi bytes; and saved on V12o domain when OBL done. if associated ENGTRIM is enabled the SMPS output voltage can be controlled by the dedicated ENGTRIM register. Default= ‘100’.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32