APB0ENR register
| TIM2EN | TIM2: Advanced Timer clock enable Set and enable by software. 0: clock disable 1: clock enable |
| TIM16EN | TIM16: Advanced Timer clock enable Set and enable by software. 0: clock disable 1: clock enable |
| SYSCFGEN | SYSTEM CONFIG clock enable Set and enable by software. 0: clock disable 1: clock enable |
| LCDEN | LCD clock enable Set and enable by software. 0: clock disable 1: clock enable |
| COMPEN | COMP clock enable Set and enable by software. 0: clock disable 1: clock enable |
| DACEN | DAC clock enable Set and enable by software. 0: clock disable 1: clock enable |
| RTCEN | RTC clock enable Set and enable by software. Reset source only for this field: PORESETn 0: clock disable 1: clock enable |
| LCSCEN | LCSC clock enable. Set and enable by software. 0: clock disable 1: clock enable |
| WDGEN | Watchdog clock enable. Set and enable by software. 0: clock disable 1: clock enable |
| DBGMCUEN | DBG MCU clock enable. Set and enable by software. 0: clock disable 1: clock enable |