APB1SMENR register
SPI1SMEN | SPI1 bus clock enable during Sleep mode bit This bit is set and reset by software.
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ADCDIGSMEN | ADCDIG bus clock enable during Sleep mode bit This bit is set and reset by software.
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LPUARTSMEN | LPUART bus clock enable during Sleep mode bit This bit is set and reset by software.
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USARTSMEN | USART bus clock enable during Sleep mode bit This bit is set and reset by software.
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SPI3SMEN | SPI3 bus clock enable during Sleep mode bit This bit is set and reset by software.
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I2C1SMEN | I2C1 clock enable during Sleep mode bit This bit is set and reset by software.
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I2C2SMEN | I2C2 clock enable during Sleep mode bit This bit is set and reset by software.
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