stm32 /stm32wl3 /STM32WL33 /RETAINED /SEQ_GLOBALTABLE_PTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SEQ_GLOBALTABLE_PTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SEQ_GLOBALTABLE_PTR

Description

SEQ_GLOBALTABLE_PTR register

Fields

SEQ_GLOBALTABLE_PTR

Contain the offset versus the SoC RAM base address of the GlobalConfiguration RAM table entry point.

Links

()