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stm32 /stm32wl3 /STM32WL33 /STATIC /PCKT_CONFIG

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Interpret as PCKT_CONFIG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CRC_MODE 0 (SECONDARY_SYNC_SEL)SECONDARY_SYNC_SEL 0SYNC_LEN0 (SYNC_PRESENT)SYNC_PRESENT 0 (LEN_WIDTH)LEN_WIDTH 0 (FIX_VAR_LEN)FIX_VAR_LEN 0PREAMBLE_LENGTH0PREAMBLE_SEQ 0POSTAMBLE_LENGTH 0POSTAMBLE_SEQ

Description

PCKT_CONFIG register

Fields

CRC_MODE

CRC type (0, 8, 16, 16 802.
SECONDARY_SYNC_SEL

In TX mode: this bit selects which synchro word is sent on the frame between SYNC and SEC_SYNC
SYNC_LEN

Length of the SYNC (and secondary) SYNC word in 1-bit granularity
SYNC_PRESENT

Indicate if a SYNC word is present on the frame or not (null length)
LEN_WIDTH

Indicates if the LENGTH field is defined on 1 byte or 2 bytes
FIX_VAR_LEN

Select the length mode
PREAMBLE_LENGTH

Length of the PREAMBLE in pairs of bits (0 to 2046)
PREAMBLE_SEQ

Select the PREAMBLE pattern to be applied
POSTAMBLE_LENGTH

Length of the POSTAMBLE in pair of bits (0 to 126 bits)
POSTAMBLE_SEQ

Packet postamble control: postamble bit sequence selection

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32