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stm32 /stm32wl3 /STM32WL33 /SWITCHABLE /IRQ_ENABLE

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Interpret as IRQ_ENABLE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BIT_SYNC_DETECTED_E)BIT_SYNC_DETECTED_E 0 (FRAME_SYNC_COMPLETE_E)FRAME_SYNC_COMPLETE_E 0 (FRAME_COMPLETE_E)FRAME_COMPLETE_E 0 (FRAME_VALID_E)FRAME_VALID_E

Description

IRQ_ENABLE register

Fields

BIT_SYNC_DETECTED_E

Preamble has been detected, the content of the PAYLOAD_X registers is not yet valid.
FRAME_SYNC_COMPLETE_E

Frame Sync has been detected, the content of the PAYLOAD_X registers is not yet valid.
FRAME_COMPLETE_E

Frame ( payload + CRC) received, the content of the PAYLOAD_X registers is valid.
FRAME_VALID_E

Frame ( payload + CRC) received wthout error (the CRC has been checked and is matching with the received CRC).

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32